As more functionality is integrated into modern microprocessors, functional units within the processor may need to be operated (“clocked”) at different clock frequencies, phases, etc. With more clocking domains within the same processor comes an increase in complexity in promoting determinism for purposes, such as testing. Some testing techniques use may use periodic system management interrupts (PSMI) to step through programs running on a processor and to return results of processing at various points in the program.
PSMI is a debug methodology whereby a logic analyzer traces external bus activity in a circular buffer while System Management Interrupts, or SMIs, are periodically generated, frequently enough that to always ensure two sequential ones are in the logic analyzer buffer. The PSMI handler saves internal processor state to memory allowing much of the internal state of the processor to be reconstructed afterwards on an emulator or software model of the processor, and the trace information is used to reproduce the bug.
Typically, PSMI relies on processing resources, such as execution resources, being synchronized with other events within the processor in order for deterministic results to be returned by processor. Use of PSMI techniques become more difficult as the number of clocking domains increases, due, for example, to more functionality being integrated within the same processor.